The present invention generally relates to semiconductor-on-insulator (SOI) integrated circuits and, more particularly, to an SOI chip having a buried oxide (BOX) layer which defines an active layer having varying thickness.
Traditional semiconductor-on-insulator (SOI) integrated circuits typically have a silicon substrate having a buried oxide (BOX) layer disposed thereon. A silicon active layer is disposed on the BOX layer. Within the active layer, active devices, such as transistors, are formed in active regions. The size and placement of the active regions are defined by isolation regions. As a result of this arrangement, the active devices are isolated from the substrate by the BOX layer. More specifically, a body region of each SOI transistor does not have body contacts and is therefore xe2x80x9cfloating.xe2x80x9d
SOI chips offer potential advantages over bulk chips for the fabrication of high performance integrated circuits for digital circuitry. Such digital circuitry is typically made from partially-depleted metal oxide semiconductor field effect transistors (MOSFETs). In such circuits, dielectric isolation and reduction of parasitic capacitance improve circuit performance, and virtually eliminate latch-up in CMOS circuits. In addition, circuit layout in SOI can be greatly simplified and the packing density greatly increased.
However, in some instances, it may be desirable to fabricate fully depleted devices on an SOI chip which also has the partially depleted devices described above. For example, a designer may wish to provide devices for analog circuitry which perform better when made from fully depleted devices having no or very little floating body effects compared to the partially depleted devices used for the digital circuitry.
Accordingly, there exists a need in the art for hybrid SOI chips with regions respectively dedicated to fully depleted devices and partially depleted devices. Such a chip could be used for constructing a mixed signal (digital and analog signals) SOI chip with regions respectively suited for digital circuitry and analog circuitry.
According to one aspect of the invention, the invention is a semiconductor-on-insulator (SOI) chip. The SOI chip having a substrate; a buried oxide (BOX) layer disposed on the substrate; and an active layer disposed on the BOX layer, the active layer divided into a first tile and a second tile, the first tile having a first thickness and the second tile having a second thickness, the second thickness being smaller than the first thickness; wherein the BOX layer is formed under the active layer in an area of the first tile by implanting oxygen ions with a first energy level and a first dosage and the BOX layer is formed under the active layer in an area of the second tile by implanting oxygen ions with a second energy level and a second dosage.
According to another aspect of the invention, the invention is a method of fabricating a semiconductor-on-insulator (SOI) chip, the SOI chip having a substrate, a buried oxide (BOX) layer disposed on the substrate and an active layer disposed on the BOX layer, the active layer divided into a first tile and a second tile. The method includes the steps of masking the second tile with a first mask, the first mask leaving the first tile exposed; implanting oxygen ions into the chip in the area of the first tile with a first energy level and a first dosage; stripping the first mask; masking the first tile with a second mask, the second mask leaving the second tile exposed; implanting oxygen ions into the chip in the area of the second tile with a second energy level and a second dosage; stripping the second mask; and annealing the chip.